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1. introduction the TFA9879 is a high-efficiency filter-fre e mono class-d audio amplifier with two separate digital inputs for mobile applications. 2. general description the TFA9879 contains a processor that supports a range of sound processing features including a 5-band parametric equalizer, separate bass and treble control, a dynamic range compressor, soft clip control and volume control. excellent audio performance combined with high power supply rejection ra tio (psrr) is achieved through the use of a closed loop configuration. two independent digital audio inputs (i 2 s-bus / pcm / iom2) are available for connecting both a baseband and a multimedia processor. the TFA9879 is available in a hvqfn24 package. 3. features and benefits 3.1 general features ? closed loop amplifier for: ? high power supply rejection ratio ? excellent audio performance ? digital input for high rf immunity ? high efficiency for maximizing battery life ? wide supply voltage range (fully operational from 2.5 v to 5.5 v) ? delivers high output power into 4 and 8 load impedances ? phase-locked loop (pll); no system clock required ? protection including diagnostics via i 2 c-bus: ? overcurrent protection (ocp) to protect agai nst short circuits across the speaker, to the supply line or to ground ? overtemperature protection (otp) ? digital inputs protected with underfreq uency protection (ufp), overfrequency protection (ofp) and invalid bit-clock protection (ibp) ? ?pop noise? free at power-up/power down , during sample rate switching and when switching between digital inputs ? four separate i 2 c-bus addresses for multi-channel applications TFA9879 mono btl class-d audi o amplifier for porta ble applications with digital input rev. 02 ? 15 october 2010 product data sheet
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 2 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input ? 1.8 v / 3.3 v tolerant digital inputs ? only three external components required 3.2 programmable digital sound processor (dsp) ? digital volume control ( ? 70 db to +24 db) ? digital parametric 5-band equalizer ? bass and treble control ( ? 18 db to +18 db) ? dynamic range compressor: ? programmable attack and release levels ? programmable attack and release rates ? soft and hard mute control ? programmable dc blocking via high-pass filter ? power limiter (0 db to ? 124 db in 0.5 db steps) ? zero crossing volume control ? stereo-to-mono down-mix function 3.3 interface format support for digital audio inputs ? i 2 s formats (f s = 8 khz to 96 khz): ? philips standard i 2 s-bus ? japanese i 2 s-bus msb-justified ? sony i 2 s-bus lsb-justified ? pcm / iom2 formats (f s = 8 khz or f s = 16 khz): ? long frame sync ? short frame sync 4. applications ? mobile phones ? portable navigation devices (pnd) ? pdas ? notebooks ? portable gaming devices ? mp3 and mp4 players
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 3 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 5. quick reference data [1] after switching from off/amplifier mode to power-down mode. 6. ordering information table 1. quick reference data all parameters are guaranteed for v ddd = 1.8 v; v ddp = 3.7 v; r l = 8 ; l l = 44 h; f i = 1 khz; f s = 48 khz; clip control off; t amb = 25 c unless otherwise specified. symbol parameter conditions min typ max unit v ddp power supply voltage on pin v ddp 2.5 - 5.5 v v ddd digital supply voltage on pin v ddd 1.65 1.8 1.95 v i p supply current on pin v ddp ; amplifier mode with load; soft mute on -5.7- ma on pin v ddp ; power-down mode - - 20 a i ddd digital supply current on pin v ddd ; amplifier mode - 1.2 - ma on pin v ddd ; power-down mode [1] -515 a p o(rms) rms output power r l =8 thd + n = 1 % 0.65 0.7 - w thd + n = 10 % - 0.85 - w r l =4 thd+n=1% - 1.2 - w thd+n=10% - 1.5 - w r l =8 ; v ddp = 4.2 v thd+n=1% - 0.9 - w thd+n=10% - 1.1 - w r l =4 ; v ddp = 4.2 v thd+n=1% - 1.6 - w thd + n = 10 % - 1.95 - w r l =8 ; v ddp = 5.0 v thd+n=1% - 1.35 - w thd+n=10% - 1.6 - w r l =4 ; v ddp = 5.0 v thd+n=1% - 2.35 - w thd + n = 10 % - 2.75 - w po output power efficiency p o(rms) = 850 mw - 92 - % table 2. ordering information type number package name description version TFA9879hn hvqfn24 plastic thermal enhanced very thin quad flat package; no leads; 24 terminals; body 4 x 4 x 0.85 mm sot616_3
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 4 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 7. block diagram fig 1. block diagram i 2 c control digital audio receiver high pass filter 5 band equalizer bass treble boost power limiter mux pwm v ddp outa outb 7, 8 10 9 pll 2nd order loop volume control drc dsp 1 23 v ddd TFA9879 2 20 21 22 17 18 19 scl sdi1 sck1 lrck1 sdi2 sck2 lrck2 16 24 adsel1 sda protection circuits: ocp otp ofp ufp ibp 6, 14 n.c. gndd staba 13 h-bridge gndp 11, 12 2nd order loop 010aaa542 test1 3 test2 15 test3 5 4 adsel2 dap
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 5 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 8. pinning information 8.1 pinning 8.2 pin description (1) exposed die attach paddle (dap) fig 2. pin configuration 010aaa58 2 TFA9879 transparent top view staba test3 n.c. n.c. adsel2 test2 test1 adsel1 scl sdi2 sda sck2 v ddp v ddp outb outa gndp gndp gndd v ddd lrck1 sck1 sdi1 lrck2 terminal 1 index area 6 13 5 14 4 15 3 16 2 17 1 18 7 8 9 10 11 12 24 23 22 21 20 19 dap (1) table 3. pin description symbol pin pin type description sda 1 io i 2 c-bus data input/output scl 2 i i 2 c-bus bit clock input test1 3 i test signal input 1; for test purposes only; connect to pcb ground adsel2 4 i address selection input 2 test3 5 i test signal input 3; for test purposes only; connect to pcb ground n.c. 6 - not connected; connect to pcb ground v ddp 7, 8 p analog supply voltage (2.5 v to 5.5 v) outb 9 o output b (negative) outa 10 o output a (positive) gndp 11, 12 p analog ground, pcb ground reference staba 13 o 1.8 v analog stabilizer output n.c 14 - not connected; connect to pcb ground test2 15 i test signal input 2; for test purposes only; connect to pcb ground adsel1 16 i address selection input 1 sdi2 17 i digital audio data input 2 sck2 18 i digital audio bit clock input 2 lrck2 19 i digital audio word select input 2 sdi1 20 i digital audio data input 1 sck1 21 i digital audio bit clock input 1 lrck1 22 i digital audio word select input 1
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 6 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 9. functional description the TFA9879 is a high-efficiency mono bridge tied load (btl) class-d amplifier with digital audio inputs. it supports all commonly used formats. the key functional blocks of the TFA9879 are shown in figure 1 . in the digital domain, the audio signal is processed and converted in to a pulse width modulated (pwm) signal using a 3-level modulation. in the analog domain, the pwm signal is amplified using a second order feedback loop. the audio signal-processing path is described below: 1. the mux selects the serial interface input to be used. 2. the digital audio receiver translates the se rial input signal into a standard internal mono audio stream. 3. the programmable hi gh-pass filter blocks dc sign als and low frequency signals. 4. the volume control provides both gain and attenuation functionality and can be adjusted by the user or dynamically via the dynamic range compressor (drc). the volume control can be used to adjust the signal level between ? 70 db and +24 db. 5. the 5-band parametric equalizer can be used to equalize the mono audio stream. it can be used for speaker transfer curv e compensation to optimize the audio performance of the speakers. 6. the bass and treble boost function prov ides another way to adjust the sound. 7. the power limiter limits the maximum output signal of t he TFA9879. the power limiter settings are 0 db to ? 124 db in steps of 0.5 db. this function can be used to limit the maximum output power delivered to the speakers at a fixed supply voltage and speaker impedance. 8. the pwm controller block converts the audio signal into a 3-level modulated pwm signal. the 3-level modulation provides a high signal-to-noise performance and eliminates clo ck jitter noise. 9. the second order feedback loop ensures excellent audio performance and high power supply rejection ratio. 10. the h-bridge allows the TFA9879 to deliver the required output power between terminals outa and outb. the internal clocks of the tfa9 879 are derived from the digi tal audio interface (sck1 and sck2) using a pll. the reference input for the pll is selected via the digital input mux. the audio signal path can be selected via the i 2 c-bus interface. the pll block generates the system clock. v ddd 23 p digital supply voltage (1.8 v) gndd 24 p digital ground, pcb ground reference dap - p exposed die attached paddle (dap); connect to pcb ground table 3. pin description ?continued symbol pin pin type description
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 7 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input the following protection circuits are built into the TFA9879: ? overtemperature protection (otp) ? overcurrent protection (ocp) ? underfrequency protection (ufp) ? overfrequency protection (ofp) ? invalid bit-clock protection (ibp) ? dc-blocking 9.1 operating modes the TFA9879 supports the following operating modes, which are controlled via the i 2 c-bus interface: ? power-down mode , used to switch off the device; current consumption is reduced to a minimum; the i 2 c-bus remains operational; the pwm outputs are disabled. ? off mode , in which the class-d amplifier is swit ched off; the TFA9879 is completely biased and the pwm outputs are disabled. ? amplifier mode, in which the digital inputs are used to generate a signal between outa and outb. the TFA9879 device control settings are detailed in table 21 . 9.1.1 power-up/power-down the power-up a nd power-down timing of th e TFA9879 is illustrated in figure 3 . the external power supply levels, v ddp and v ddd , should be within the specified operating ranges before the operating mode is sele cted. bit powerup in the device control register ( table 21 ) must be set to 1 before the operating mode can be selected via bits opmode. after the turn-on delay (t d(on) ), the device automatically generates a soft un-mute function. a soft mute function is generated when opmode is set to 0. the TFA9879 should be set to power-down mode before the power supplies are disconnected or turned off.
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 8 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 9.1.2 supported digital audio data formats the TFA9879 supports a commonly used range of i 2 s, pcm and iom2 digital audio data formats. the i 2 s formats, selected via bits i2s_set in the serial interface control register ( ta b l e 2 2 ), are listed in table 4 . the pcm/iom2 formats are listed in ta b l e 5 . the TFA9879 automatically detects the number of slots by measuring the ratio between the sync frequency (8 khz) and the data clock. ta b l e 2 4 details the i 2 c settings for the pcm/iom2 formats. fig 3. power-up/power-down timing filtered btl output signal outa, outb serial interface input signals i 2 c powerup (00h, bit 0) v ddp , v ddd i 2 c opmode (00h, bit 3) operating t d(soft_mute) 010aaa65 3 t d(on) t d(mute_off)
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 9 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input table 4. i 2 s-supported digital audio data formats sck frequency interface format (msb first) supported data format 32 f s i 2 s (philips) standard up to 16-bit data 32 f s msb-justified up to 16-bit data 32 f s lsb-justified - 16 bits 16-bit data 64 f s i 2 s (philips) standard up to 24-bit data 64 f s msb-justified up to 24-bit data 64 f s lsb-justified - 16 bits 16-bit data 64 f s lsb-justified - 18 bits 18-bit data 64 f s lsb-justified - 20 bits 20-bit data 64 f s lsb-justified - 24 bits 24-bit data fig 4. i 2 s-supported digital audio data formats 16 msb b2 b3 b4 b5 b6 left lsb-justified format 20 bits ws bck data right 15 18 17 20 19 2 1 b19 lsb 16 msb b2 b3 b4 b5 b6 15 18 17 20 19 2 1 b19 lsb msb msb b2 2 1 12 3 left i 2 s-bus format ws bck data right 3 msb b2 010aaa45 8 16 b5 b6 b7 b8 b9 b10 left lsb-justified format 24 bits ws bck data right 15 18 17 20 19 22 21 23 24 2 1 b3 b4 msb b2 b23 lsb 16 b5 b6 b7 b8 b9 b10 15 18 17 20 19 22 21 23 24 2 1 b3 b4 msb b2 b23 lsb 16 msb b2 left lsb-justified format 16 bits ws bck data right 15 2 1 b15 lsb 16 msb b2 15 2 1 b15 lsb 16 msb b2 b3 b4 left lsb-justified format 18 bits ws bck data right 15 18 17 2 1 msb b2 b3 b4 b17 lsb 16 15 18 17 2 1 b17 lsb msb-justified format ws left right 3 2 1 3 2 1 msb b2 msb lsb lsb msb b2 b2 bck data
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 10 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input table 5. pcm/iom2-supported audio data formats number of slots f s (khz) sync frequency (khz) on lrck pin supported data formats data clock (khz) on sck pin 2 8 or 16 8 8-bit data 128 2 8 or 16 8 8-bit data 128 4 8 or 16 8 8-bit data 256 4 8 or 16 8 8-bit data 256 6 8 or 16 8 8-bit data 384 8 8 or 16 8 8-bit data 512 12 8 or 16 8 8-bit data 768 16 8 or 16 8 8-bit data 1024 reserved 2 8 or 16 8 16-bit data 256 3 8 or 16 8 16-bit data 384 4 8 or 16 8 16-bit data 512 6 8 or 16 8 16-bit data 768 8 8 or 16 8 16-bit data 1024 12 8 or 16 8 16-bit data 1536 12 8 or 16 8 16-bit data 1536 fig 5. pcm/iom2-supported digital audio data formats msb lrck sck sdi lsb msb b2 b2 lsb msb short sync pcm/iom2 format slot 0 slot 1 slot 2 slot n ? 1 slot n b2 lsb msb b2 lsb msb lrck sck sdi lsb msb b2 b2 lsb msb long sync pcm/iom2 format slot 0 slot 1 slot 2 slot n ? 1 slot n 010aaa65 2 b2 lsb msb b2 lsb
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 11 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 9.2 digital signal pr ocessor (dsp) features 9.2.1 serial interface selection the TFA9879 contains two serial interfaces. the active interface is selected via bit input_sel in the device control register (see ta b l e 2 1 ). when this bit is toggled, the following sequence is initiated: ? soft mute is activated for 128/f s seconds ? the TFA9879 switches to off mode and the serial interface input is toggled ? the TFA9879 switches back to operating mode and soft mute is released 9.2.2 mono selection mono selection is used to select the digita l audio input channel to be amplified. the options are: ? left channel ? right channel ? left + right channels (sum divided by two) separate mono selection is pr ovided for the two serial inte rfaces via bits mono_sel in the serial interface control registers (addresses 01h and 03h; see table 22 ). 9.2.3 programmable high-pass filter the TFA9879 features a first-order high-pass f ilter on the digital audio input to block dc and low frequency signals. dc values at the output can damage the speaker. the high-pass filter cut-off frequency is determined by: ? the high-pass filter control setting (bits hp_ctrl, see ta b l e 3 0 ) ? the sample frequency, f s the relationship between these parameters and the cut-off frequency is defined in equation 1 : (1) hp_ctrl can be programmed to any integer value between 0 and 511 (see ta b l e 3 0 ). the high-pass filter is bypassed if hp_ctrl = 0 or bit hpf_bp in the bypass control register is set to 1 (see table 27 ). 9.2.4 de-emphasis digital de-emphasis is sometimes needed, es pecially with older recordings. emphasis and de-emphasis originate in the fm transmi ssion, in which the signal-to-noise ratio (snr) is not flat over the signal band (in fact the snr gets worse as the signal frequency increases). to achieve good snr over the complete audio band, the high frequency components of the audio signal were amplified prior to transmission (this is called emphasis). f high 3db ? () f ? s 4096 hp _ ctrl ? 4096 --------------------------------------------- ?? ?? ln 2 --------------------------------------------------------------------- - =
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 12 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input the de-emphasis filter is a simple first order filter. the cut-off frequency of the de-emphasis low-pass filter is approximately 3.5 khz. the TFA9879 de-emphasis filter is supported for four sample frequencies, as detailed in ta b l e 6 . [1] value selected via bits de_phas in the de-emphasis, soft/hard mute and power limiter control register (see table 32 ). [2] default value. 9.2.5 equalizer the equalizer can be used for speaker curve compensation or for customer equalizer settings, such as jazz, pop, rock or clas sical music. the equalizer function can be bypassed or configured as 5-band. 9.2.5.1 equalizer band function the shape of each parametric equalizer band is determined by the following three filter parameters: ? (relative) center frequency ? quality factor q ? gain factor g in the above equation, f c is the center frequency and f s is the sample frequency. the definition of the quality factor is the ce nter frequency divided by the 3 db bandwidth (see equation 2 ). in parametric equalizers this is only valid when the gain is set very low ( ? 30 db). (2) each band filter can be programmed to perform a band-suppression (g < 1) or a band-amplification (g > 1) function around the center frequency. each band of the TFA9879 equalizer has a second order regalia-mitra all-pass filter structure. the structure is shown in figure 6 . table 6. de-emphasis control [1:0] control value [1] f s (khz) 00 [2] de-emphasis inactive 01 32 10 44.1 11 48 2 f c f s ? () = q f c f 2 f 1 ? ------------- - ; = f 1 : 20 a f 1 a f c ------ - ?? ?? ?? 10 log 3db f c f 1 > = f 2 : 20 a f 2 a f c ------ - ?? ?? ?? 10 log 3db f 2 f c > , =
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 13 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input the transfer function of this all-pass filter is given in equation 3 : (3) a(z) is the second order filter structure. the transfer function of a(z) is given in equation 4 : (4) z ? 1 equals one f s delay period. the relationship between the programmable parameters k 0 , k 1 and k 2 and the filter parameters g, and q is shown in equation 5 and equation 6 . equation 5 can be used to calculate band suppression (g < 1) functions. (5) equation 6 can be used to calculate band amplification (g 1) functions. (6) the ranges of the parametric equalizer settings for each band are: ? the gain, g, is from ? 30 db to +12 db. ? the center frequency, f c , is from 0.0004 f s to 0.49 f s . ? the quality factor, q, is from 0.001 to 8. filter coefficients need to be entered for each filter stage via the i 2 c-bus interface to configure the filters (see section 10.4.3 ). figure 7 , figure 8 and figure 9 illustrate some possible equaliz er band transf er functions. the relationships are symmetrical for the suppression and amplification functions. a skewing effect can be observed at higher frequencies. fig 6. regalia-mitra fi lter flow diagram ? x(z) a(z) s y(z) + + + ? 010aaa40 6 k 0 /2 hz () 12 ? 1az () + () k 0 2 ? 1az () ? () ? + ? = az () k 1 k 2 1k 1 + () z 1 ? z 2 ? + ?? + 1k 2 1k 1 + () z 1 ? k 1 z 2 ? ? + ?? + ------------------------------------------------------------------------------ - = k 0 g = k 1 cos ? = k 2 2q g sin ? ? () 2q g sin + ? () ? = g1 < k 0 g = k 1 cos ? = k 2 2q sin ? () 2q sin + () ? = g1
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 14 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input for optimum numerical noise performance, di fferent configurations are available for a given filter transfer func tion. the binary filter configuration parameters t 1 and t 2 control the actual configuration and should be chosen according to equation 7 . (7) a maximum of 12 db amplification, with respec t to the input signal, can be achieved per equalizer stage. the equalizer band signals ar e processed in sequence, from the highest (band a) to the lowest (band e). each band can attenuate the signal by 6 db so, in order to prevent numerical clipping at filter settings of over 6 db amplification, band filters can be scaled by 0 db or ? 6 db. for optimum numerical noise performance, steps of ? 6 db amplification should be applied to the bands in sequence, starting with b and a, as long as they are able to amplify the signal without clipping. a filter scale factor, s, is associated with ea ch of the equalizer bands and is set via the relevant eqx_s control bit (see ta b l e 2 5 ). 9.2.5.2 equalizer band control for compact representation with positive signed parameters, parameters k 1 ? and k 2 ? are introduced in equation 8 . (8) parameters k 0 , k 1 ', k 2 ', t 1 , t 2 and s must be combined in two 16-bit control words, word1 and word2 (see ta b l e 2 4 and ta b l e 2 5 ), using the format shown in ta b l e 8 . parameters k 1 ' and k 2 ' are unsigned floating-point representations in equation 8 . (9) in equation 9 , m is the unsigned mantissa and e the negative signed exponent. for example, in word2 bits [14:8] = [0111 010] represent k 2 ' = (7/2 4 ) 2 ? 2 = 1.09375 10 ? 1 . table 7. equalizer filter scale factor settings s scale factor (db) 00 1 ? 6 t 1 0k 1 0 1k 1 0 > ? ? ? = t 2 0k 2 0 1k 2 0 < ? ? ? = k 0 k 0 = k 1 1k 1 ? t 1 0 = 1k 1 + t 1 1 = ? ? ? = k 2 1k 2 ? t 2 0 = 1k 2 + t 2 1 = ? ? ? = k x m2 e ? ? m1 < =
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 15 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input table 8. equalizer control word construction word section data word1 15 t 1 word1 [14:4] 11 mantissa bits of k 1 ? word1 [3:0] four exponent bits of k 1 ? word2 15 t 2 word2 [14:11] four mantissa bits of k 2 ? word2 [10:8] three exponent bits of k 2 ? word2 [7:1] k 0 ? word2 0 s fig 7. transfer functions for selected values of q, the quality factor fig 8. transfer functions for selected values of f c , the center frequency 010aaa222 4 8 12 g (db) 0 f (hz) 10 10 5 10 4 10 2 10 3 q1 = 0.27 q2 = 0.61 q3 = 1.65 010aaa223 f (hz) 10 10 5 10 4 10 2 10 3 4 8 12 g (db) 0
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 16 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 9.2.6 bass and treble control the TFA9879 contains first order shelving filter s for bass and treble control. the device can attenuate or boost the bass and high frequency signals independently in 2 db steps within a ? 18 db to +18 db range. attenuation a nd boosting are dependent on the audio signal zero crossing settings (see section 9.2.9 for further details). the bass and treble corner frequencies are adjustable. the bass and treble corner frequencies, as a function of the i 2 c control settings and the sample rate, are given in table 9 . [1] value selected via bits f_bass in the bass and treble control register (see ta b l e 2 9 ). [2] value selected via bits f_treble in the bass and treble control register (see table 29 ). [3] default value. fig 9. transfer functions for selected values of g, the gain factor 010aaa224 f (hz) 10 10 5 10 4 10 2 10 3 0 -6 6 12 g (db) -12 table 9. corner frequency settings for bass and treble control control value f s (khz) corner frequency (hz) bass [1] treble [2] 00 8, 16, 32, 64 181 1090 11.025, 22.05, 44.1, 88.2 250 1500 12, 24, 48, 96 272 1630 01 [3] 8, 16, 32, 64 218 2180 11.025, 22.05, 44.1, 88.2 300 3000 12, 24, 48, 96 326 3260 10 8, 16, 32, 64 300 3000 11.025, 22.05, 44.1, 88.2 413 4130 12, 24, 48, 96 450 4500 11 reserved
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 17 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input figure 10 shows the bass function for a range of attenuation and boost settings with a sample rate of 48 khz and a corner frequency of 272 hz. figure 11 shows the treble function for a range of attenuation and boost settings with a sample rate of 48 khz and a corner frequency of 1630 hz. 9.2.7 muting the TFA9879 support two muting options, which are controlled via the i 2 c-bus interface: ? soft muting ? hard muting v ddp = 3.7 v, 2 8 btl configuration, treble c ontrol = 0 db, clip control on fig 10. bass function in 2 db steps; the treble control is set to flat v ddp = 3.7 v, 2 8 btl configuration, bass control = 0 db, clip control on fig 11. treble function in 2 db steps; the bass contro l is set to flat 010aaa650 f (hz) 10 10 5 10 4 10 2 10 3 0 ? 10 10 20 db ? 20 010aaa649 f (hz) 10 10 5 10 4 10 2 10 3 0 ? 10 10 20 db ? 20
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 18 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input soft muting prevents audible pops. the function smoothly reduces the gain setting of the audio channel to the mute level according to a raised cosine shape. soft muting is performed in 128 / f s steps. soft de-mute results in a si milar gain increase . bit s_mute in ta b l e 3 2 enables and disables the soft mute function. the hard mute function immedi ately switches the outputs to 50 % duty-cycle pulses. as a result, the input signals are abruptly blocked. hard mute takes prio rity over soft mute. hard mute is enabled and disabled via bit h_mute in ta b l e 3 2 . 9.2.8 digital volume control the digital volume control has a range of ? 70 db to + 24 db, programmable in 0.5 db steps. the default setting is mute (0 bd). attenuation and boos ting behavior is affected by the zero crossing volume setting (see section 9.2.9 for further details). the volume control settings, and the resultin g amplification or suppression factors, are detailed in table 10 . [1] control value is selected via bits vo l in the volume control register (see table 31 ). [2] default value. 9.2.9 zero-crossing volume control the TFA9879 employs zero-crossing volume control to minimize pop noise when the volume or bass/treble control is changing. when zero-crossing volume control is enabled (zr_crss = 1; see table 31 ), the TFA9879 increases or decreases the gain only when the audio signal passes a zero crossing. 9.2.10 dynamic range compressor (drc) the TFA9879 provides a drc to automatica lly adjust power levels according to programmable attack and release levels. the atta ck level is related to the peak value of the signal; the release level is related to the rms value of the signal. the attack level is programmable using 16 available levels in the range ? 12 db to +10 db. the release level is programmable using 16 available levels in the range ? 29 db to 0 db relative to the attack level. the signal level is measured after equalizer, bass and treble processing, but before it reaches the power limiter. the drc can be bypassed via bit drc_bp in ta b l e 2 7 . table 10. volume control amplification and suppression control value [1] gain (db) 00h +24 01h +23.5 .. .... steps of 0.5 db bbh ? 69.5 bch ? 70 bdh [2] mute .. .... mute ffh mute
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 19 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 9.2.10.1 functional description the drc compresses the dynamic range of the audio stream. the volume control, equalizer or bass/treble controls can be set so that the audio stream exceeds the 0 dbfs clip level. the drc can be programmed to co mpress the louder audio content when this occurs, while quieter sounds rema in unaffected, i.e. the drc soft clips the audio stream. this is useful when background noise overpowers quiet audio passages. increasing the volume using the volume control can make quiet audio passages audible but can cause louder audio passages to be distorted by c lipping. the drc prevents this distortion happening by reducing the volume during lo ud audio passages and increasing it again for quiet passages. the design of the drc feedback loop, incorporating the equalizer and bass and treble controls, is illustrated in figure 12 . 9.2.10.2 drc control the drc has four programmable control settings: ? attack level ? attack rate ? release level ? release rate the drc reduces the volume when the audio signal level exceeds the attack level. the attack level is based on the audio peak value. when the audio signal level drops below the attack level, the drc stops reducing the volume. the rate of decrease is programmable via the attack rate. the drc increases the audio signal level again when it drops below the release level. this level is based on the audio rms-value and is related to the attack level. the rate of increase is programmable via the release level. the drc stops increasing the volume when the audio signal level reaches the release level or the drc volume falls to 0 db. figure 13 shows the attack and release behavior of the drc. fig 12. drc feedback design 010aaa55 0 parametric 5-band equalizer bass and treble control limiter rms volume control setting audio in drc volume drc
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 20 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input [1] the control value is selected via bits at_lvl in the drc control register (see table 28 ). [2] the control value is selected via bits rl_lvl in the drc control register (see table 28 ). [3] 0 db (rms) release level equals 0 db (peak) attack level. [4] default value. fig 13. drc attack and release behavior release level (rms-value) audio in audio out rms value release rate (db/ms) attack level (peak value) attack rate (db/ms) attack level (peak value) 010aaa65 4 table 11. drc attack and release levels control value: attack level [1] attack level based on peak value; absolute value (dbfs) control value: release level [2] release level based on rms value (relative to the attack level [3] ) (db) 0000 ? 12 0000 ? 29 0001 ? 10 0001 ? 26 0010 ? 8 0010 ? 23 0011 ? 6 0011 ? 20 0100 ? 5 0100 ? 18 0101 ? 4 0101 ? 16 0110 ? 30110 ? 14 0111 ? 2 0111 ? 12 1000 ? 1 1000 ? 10 1001 [4] 0 1001 ? 8 1010 1 1010 ? 6 1011 2 1011 [4] ? 4 1100 4 1100 ? 3 1101 6 1101 ? 2 1110 8 1110 ? 1 1111 10 1111 0
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 21 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input [1] the control value is selected via bits at_rate in the drc control register (see table 28 ). [2] the control value is selected via bits rl_rate in the drc control register (see table 28 ). [3] default value. 9.2.11 power limiter the power limiter controls the maximum output voltage in amplifie r mode. this feature makes it possible to limit the output vo ltage across a peripheral (speaker) when necessary. the TFA9879 output voltage is dependent on: ? the analog supply voltage on pin v ddp ? the gain of the power limiter (g) ? the power limiter input signal (x i ) the bass/treble output signal is connected to the power limiter input and is relative to the fraction of full scale (ffs), from ? 1 to +1. equation 10 shows the relationship between these settings and the output voltage between pins outa and outb in the audio bandwidth: (10) equation 10 only applies with no load and with clip control off (see section 9.3 ). clip control and the r dson of the power switches reduce the maximum clipped output signal. the power limiter gain can be reduced in 249 steps of 0.5 db in the range 0 db to ? 124 db. table 12. drc attack and release rates control value: attack rate [1] attack rate (db/ms) control value: release rate [2] release rate (db/ms) 0000 3 0000 0.5 0001 2.7 0001 0.137 0010 [3] 2.25 0010 0.075 0011 1.8 0011 0.05 0100 1.35 0100 0.036 0101 0.9 0101 0.03 0110 0.45 0110 0.026 0111 0.225 0111 0.021 1000 0.15 1000 0.020 1001 0.11 1001 0.017 1010 0.09 1010 [3] 0.015 1011 0.075 1011 0.014 1100 0.065 1100 0.013 1101 0.06 1101 0.012 1110 0.055 1110 0.011 1111 0.05 1111 0.01 v o x i g 5.91 v ddp ? ? ? = x i g 5.91 v ddp < x i g 5.91 v ddp (v)
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 22 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input the maximum peak output voltage for the first ten power limiter gain settings is given in ta b l e 1 3 . [1] the control value is selected via bits p_lim in t he de-emphasis, soft/hard mute and power limiter control register (see table 32 ). [2] default value. 9.3 class-d amplificatio n and clip control a fourth order sigma delta pwm converter converts the digital audio streams into 3-level modulated pwm signals. the analog back en d amplifies the two pwm signals in a btl configuration with complementary output stages. one of two clip control conf igurations can be selected: ? smooth clipping, clip control on ? maximum power, clip control off if smooth clipping is selected (clipctrl = 0; see ta b l e 2 7 ), the clipping behavior will have no artefacts. to obtain the maximum po ssible output power, the device can be set to maximum power. the pwm frequency is related to the i 2 s input sample rate as detailed in table 4. 9.4 protection the TFA9879 incorpor ates a wide range of protection circui ts to facilitate optimal and safe application. the following protection circuits are included in the TFA9879: table 13. power limiter control settings all parameters are guaranteed for v ddp = 5 v; no load; f i = 1 khz; f s = 48 khz; clip control off; t amb =25 c unless otherwise specified. control value [1] power limiter gain (db) maximum peak output voltage (v) 00h [2] 0.0 v ddp 01h ? 0.5 v ddp 02h ? 1.0 v ddp 03h ? 1.5 v ddp 04h ? 2.0 4.7 05h ? 2.5 4.4 06h ? 3.0 4.2 07h ? 3.5 4.0 08h ? 4.0 3.7 09h ? 4.5 3.5 table 14. power limiter control settings pwm frequency (khz) sample rate (khz) sck relative to sample rate 256 8, 16, 32, 64 32 , 64 352.8 11.025, 22.05, 44.1, 88.2 32 , 64 384 12, 24, 48, 96 32 , 64
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 23 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input ? overtemperature protection (otp) ? overcurrent protection (ocp) ? underfrequency protection (ufp) ? overfrequency protection (ofp) ? invalid bit-clock protection (ibp) ? dc-blocking via high-pass filter (see section 9.2.3 ) the reaction of the device to fault conditio ns differs depending on the protection circuit involved. 9.4.1 overtemperature protection (otp) this is a ?hard? protection to prevent h eat damage to the TFA9879. overtemperature protection is triggered when the junction temperature exceeds 130 c. when this happens, the output stages are set floating. otp can be cleared automatically via a programmable timer or via the i 2 c-bus interface, after which th e output stages will start to operate normally again. the programmable time r settings, selected via bits l_otp in the bypass control register ( ta b l e 2 7 ), are: ? 4.5 s ? 100 ms ? 1 s otp can also be set to no recovery. setting the TFA9879 to off mode and subsequently to amplifier mode clears the otp when no recovery is selected. 9.4.2 overcurrent protection (ocp) the output current of the class-d amplifiers is current limited. when an output stage exceeds a current in the range 1.3 a to 2.3 a, the output stages are set floating. ocp can be cleared automatically via a programmable timer or via the i 2 c-bus interface, after which the output stages will start to operat e normally again. t he programmable timer settings, selected via bits l_ocp in the bypass control register ( ta b l e 2 7 ), are: ? 4.5 s ? 27.5 s ? 10 ms the ocp can also be set to no recovery. setting the TFA9879 to off mode and subsequently to amplifier mode clears the ocp when no recovery is selected. 9.4.3 underfrequency protection (ufp) ufp sets the output stages floating when the clock input source is too low (< f ufp ). this can happen if, for example, the selected sample frequency (bits i2s_fs in ta b l e 2 2 ) is not in line with the applied sample rate. the pwm switching fre quency can become critically low when the frequency of the input clock is lower than the selected sample frequency. without ufp, peripheral devices in an application might be damaged. the ufp status can be mo nitored by polling the i 2 c status register ( table 33 ). the alarm will be raised when the input sample rate is too low.
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 24 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 9.4.4 overfrequency protection (ofp) ofp sets the output stages floating when the clock input source is too high (>f ofp ). this can happen if, for example, the selected sample frequency (bits i2s_fs in ta b l e 2 2 ) is not in line with the applied sample rate. the pwm controller can become unstable when the frequency of the input clock is higher than the selected sample frequency. without ofp, peripheral devices in an application might be damaged. the ofp status can be monitored by polling the i 2 c status register ( ta b l e 3 3 ). the alarm will be raised when the input sa mple rate is too high. 9.4.5 invalid bit-clock protection (ibp) if the sck-to-lrck ratio is not supported, the audio signal will be distorted. this occurs because the sound processi ng blocks will be operating at frequencies out of synchronization with the sample rate. ibp prevents this happening by shutting down the TFA9879 if the ibp alarm is raised for the selected channel. this will di sconnect the digital audio path. valid sck-to-lrck ratios for pcm interface fo rmats are 16, 32, 48, 64, 96, 128 and 192. for i 2 s interface formats, valid sck-to-lrck ratios are 32 and 64. 9.4.6 overview of protection circuits ta b l e 1 5 provides an overview of the protection circuits implemented. 10. i 2 c-bus interface and register settings 10.1 i 2 c-bus interface the TFA9879 supports the 400 khz i 2 c-bus microcontroller interface mode standard. the i 2 c-bus is used to control the TFA9879 and to transmit and receive data. the TFA9879 can operate only in i 2 c slave mode, as a slave receiver or as a slave transmitter. table 15. overview of protection circuits protection circuits symbol conditions i 2 c flag output recovery otp t j > 130 c otp floating automatic when timer set to 4.5 s, 100 ms or 1 s (via bits l_otp in ta b l e 2 7 ) and t j < 130 c; via i 2 c-bus when no recovery is selected ocp i o > i o(ocp) ocp floating automatic when timer set to 4.5 s, 27.5 s or 10 s (via bits l_ocp in table 27 ) and i o < i o(ocp) ; via i 2 c-bus when no recovery is selected ufp pwm frequency < 96 khz ufp floating restart (fault to operating when pwm frequency > 96 khz) ofp pwm frequency > 1031 khz ofp floating restart (fault to operating when pwm frequency < 1031 khz) ibp sck/ws is not 16 1, 32 1, 48 1, 64 1 or 128 1 ibp floating restart (fault to operating when sck/ws is 16 1, 32 1, 48 1, 64 1 or 128 1)
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 25 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input the TFA9879 is accessed via an 8-bit code (see ta b l e 1 6 ). bits 1 to 7 contain the device address. bit 0 (r/w ) indicates whether a read (1) or a write (0) operation has been requested. four separate addresses are supported for multichannel applications. applying the appropriate voltage to pins adsel1 (a1) and adsel2 (a2) select the required i 2 c address as detailed in ta b l e 1 6 . 10.2 i 2 c-bus write cycle the sequence of events that needs to be followed when writing data to the TFA9879?s i 2 c-bus registers is detailed in table 18 . one byte is transmitted at a time. each register stores two bytes of data. data is always written in byte pairs. data transfer is always msb first. the write cycle sequence using sda is as follows: 1. the microcontroller asserts a start condition (s). 2. the microcontroller transmits the 7-bit dev ice address of the TFA9879, followed by the r/w bit set to 0. 3. the TFA9879 asserts an acknowledge (a). 4. the microcontroller transmits the 8-bit TFA9879 register address to which the first data byte will be written. 5. the TFA9879 asserts an acknowledge. 6. the microcontroller transmits the first byte (the most significant byte). 7. the TFA9879 asserts an acknowledge. 8. the microcontroller transmits the second byte (the least significant byte). 9. the TFA9879 asserts an acknowledge. 10. the microcontroller can either assert the stop condition (p) or continue transmitting data by sending another pair of data bytes, repeating the sequence from step 6. in the latter case, the targeted r egister address will have bee n auto-incremented by the TFA9879. table 16. i 2 c-bus device address bit 7 (msb) bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 (lsb) 1 1011a2a1r/w table 17. i 2 c pin voltages in i 2 c control mode logic value voltage on pins adsel1 and adsel2 0< v il 1> v ih table 18. i 2 c-bus write cycle start TFA9879 address r/w TFA9879 first register address msb lsb more data... stop s 11011a 2 a 1 0 a addr a ms1 a ls1 a <....> p
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 26 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 10.3 i 2 c-bus read cycle the sequence of events that needs to be followed when reading data from the TFA9879?s i 2 c-bus registers is detailed in table 19 . one byte is transmitted at a time. each of the registers stores two bytes of data. data is alwa ys written in byte pairs. data transfer is always msb first. the read cycle sequence using sda is as follows: 1. the microcontroller asserts a start condition (s). 2. the microcontroller transmits the 7-bit dev ice address of the TFA9879, followed by the r/w bit set to 0. 3. the TFA9879 asserts an acknowledge (a). 4. the microcontroller transmits the 8-bit TFA9879 register address from which the first data byte will be read. 5. the TFA9879 asserts an acknowledge. 6. the microcontroller asserts a repeated start (sr). 7. the microcontroller re-transmits the device address followed by the r/w bit set to 1. 8. the TFA9879 asserts an acknowledge. 9. the TFA9879 transmits the first byte (the msb). 10. the microcontroller asserts an acknowledge. 11. the TFA9879 transmits the second byte (the lsb). 12. the microcontroller asserts either an acknowledge or a negative acknowledge (na). ? if the microcontroller asserts an acknowledge, the target register address is auto-increased by the TFA9879 and steps 9 to 12 are repeated. ? if the microcontroller asserts a negative acknowledge, the TFA9879 frees the i 2 c-bus and the microcontroller gen erates a stop condition (p). 10.4 top-level register map ta b l e 2 0 describes the top-level assignment of regi ster addresses to the functional control and status areas. there are 21 cont rol registers and 1 status register. table 19. i 2 c-bus read cycle start TFA9879 address r/w first register address TFA9879 address r/w msb lsb more data... stop s11011a 2 a 1 0aaddrasr11011a 2 a 1 1 a ms1 a ls1 a <....> na p table 20. top-level register map register address (hex) default (hex) access description 00h 0x0000 r/w device control; see ta b l e 2 1 01h 0x0a18 r/w serial interface input 1; see ta b l e 2 2 02h 0x0007 r/w pcm/iom2 format input 1; see table 23 03h 0x0a18 r/w serial interface input 2; see ta b l e 2 2 04h 0x0007 r/w pcm/iom2 format input 2; see table 23 05h 0x59dd r/w equalizer_a word_1; see ta b l e 2 4
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 27 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input the following subsections provide details of th e of the bits in these registers and the control and status functionality assigned to each. 10.4.1 device control 06h 0xc63e r/w equalizer_a word_2; see ta b l e 2 5 07h 0x651a r/w equalizer_b word_1; see ta b l e 2 4 08h 0xe53e r/w equalizer_b word_2; see ta b l e 2 5 09h 0x4616 r/w equalizer_c word_1; see ta b l e 2 4 0ah 0xd33e r/w equalizer_c word_2; see ta b l e 2 5 0bh 0x4df3 r/w equalizer_d word_1; see ta b l e 2 4 0ch 0xea3e r/w equalizer_d word_2; see ta b l e 2 5 0dh 0x5ee0 r/w equalizer_e word_1; see ta b l e 2 4 0eh 0xf93e r/w equalizer_e word_2; see ta b l e 2 5 0fh 0x0093 r/w bypass control; see ta b l e 2 7 10h 0x92ba r/w dynamic range compressor; see table 28 11h 0x12a5 r/w bass and treble; see ta b l e 2 9 12h 0x0004 r/w high-pass filter; see ta b l e 3 0 13h 0x10bd r/w volume control; see ta b l e 3 1 14h 0x0000 r/w de-emphasis, soft/hard mute and power limiter; see table 32 15h - r miscellaneous status; see ta b l e 3 3 table 20. top-level register map ?continued register address (hex) default (hex) access description table 21. device control register (address 00h) bit description bit symbol access default description 15:5 reserved 0x000 4 input_sel r/w 0 serial interface input selection: 0: serial interface input 1 1: serial interface input 2 3 opmode r/w 0 operating mode selection: 0: off mode 1: amplifier mode 2 reserved 0 1 reset r/w 0 i 2 c reset activation: 0: reset inactive 1: reset active; 1 is written to generate a reset, after which the reset bit is aut omatically reset to 0 0 powerup r/w 0 power-down mode selection: 0: power-down mode 1: operating mode (dependent on opmode)
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 28 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 10.4.2 serial interface control table 22. serial interface control registers (addresses 01h and 03h [1] ) bit description bit symbol access default description 15:12 reserved 0000 11:10 mono_sel r/w 10 mono selection: 00: left channel; left channel content is amplified in amplifier mode 01: right channel; right channel content is amplified in amplifier mode 10: left + right channels; sum of left and right channels, divided by two, is amplified in amplifier mode 11: reserved 9:6 i2s_fs r/w 1000 sample frequency (f s ) of digital-in signal: 0000: 8 khz 0001: 11.025 khz 0010: 12 khz 0011: 16 khz 0100: 22.05 khz 0101: 24 khz 0110: 32 khz 0111: 44.1 khz 1000: 48 khz 1001: 64 khz 1010: 88.2 khz 1011: 96 khz 1100 to 1111: reserved 5:3 i2s_set r/w 011 i 2 s format selection: 000: reserved 001: reserved 010: msb-justified data up to 24 bits 011: i 2 s data up to 24 bits 100: lsb-justified 16-bit data 101: lsb-justified 18-bit data 110: lsb-justified 20-bit data 111: lsb-justified 24-bit data 2 sck_pol r/w 0 enable sck signal polarity inversion: 0: no sck signal polarity inversion 1: sck signal polarity inversion enabled
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 29 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input [1] serial interface 1 settings are controlled via regist er 01h; serial interface 2 settings are controlled via register 03h. [1] pcm/iom2 format settings of serial interface 1 are c ontrolled via register 02h; pcm/iom2 format settings of serial interface 2 are controlled via register 04h. 1:0 i_mode r/w 00 input audio mode selection: 00: i 2 s mode 01: pcm/iom2 short frame sync format 10: pcm/iom2 long frame sync format 11: reserved table 23. pcm/iom2 format control registers (addresses 02h and 04h [1] ) bit description bit symbol access default description 15:12 reserved 0000 11 pcm_fs r/w 0 pcm sample frequency: 0: 8 khz 1: 16 khz 10 a_law r/w 0 u-law/a-law decoding selection (depending on pcm_comp): 0: u-law decoding; default value 1: a-law decoding 9 pcm_comp r/w 0 companded pcm data: 0: linear 1: companded (u/a-law) 8 pcm_dl r/w 0 pcm data length (number of bits per slot): 0: 8-bit; default value 1: 16-bit 7:4 d1_slot r/w 0000 slot number position of the first sample (at 8 khz and 16 khz): 0000: slot 0 0001: slot 1 .. .. 1111: slot 15 3:0 d2_slot r/w 0111 slot number position of the second sample (16 khz): 0000: slot 0 0001: slot 1 .. .. 0111: slot 7 .. .. 1111: slot 15 table 22. serial interface control registers (addresses 01h and 03h [1] ) bit description bit symbol access default description
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 30 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 10.4.3 equalizer configuration [1] default settings are given in table 20 . the corresponding equalizer c onfiguration is shown in table 26 . [1] default settings are given in table 20 . the corresponding equalizer c onfiguration is shown in table 26 . table 24. equalizer word1 control registers (addresses 05h, 07h, 09h, 0bh and 0dh for equalizer bands a, b, c, d and e respectively) bit description ?x? represents the equalizer band a, b, c, d or e bit symbol access default [1] description 15 eqx_t1 r/w filter configuration parameter t 1 ; see section section 9.2.5.1 14:4 eqx_k1m r/w 11 mantissa bi ts of filter parameter k 1 ?; see section 9.2.5.1 3:0 eqx_k1e r/w four exponent bi ts of filter parameter k 1 ?; see section 9.2.5.1 table 25. equalizer word2 control register (addresses 06h, 08h, 0ah, 0ch and 0eh for equalizer bands a, b, c, d and e respectively) bit description ?x? represents the equalizer band a, b, c, d or e bit symbol access default [1] description 15 eqx_t2 r/w filter configuration parameter t 2 ; see section section 9.2.5.1 14:11 eqx_k2m r/w four mantissa bits of filter parameter k 2 ?; see section 9.2.5.1 10:8 eqx_k2e r/w three exponent bits of filter parameter k 2 ?; see section 9.2.5.1 7:1 eqx_k0 r/w seven-bit of filter gain parameter k 0 ; see section 9.2.5.1 0 eqx_s r/w filter scale-factor (s); see section 9.2.5.1 0: no scaling applied 1: ? 6 db amplification enabled table 26. default equalizer configuration for f s = 48 khz band a b c d e frequency (hz) 100 300 1000 3000 10000 q-factor 1.65 1.65 1.65 1.65 1.65 gain (db)00000
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 31 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 10.4.4 bypass control 10.4.5 dynamic range compressor table 27. bypass control register (addresses 0fh) bit description bit symbol access default description 15:8 reserved 0x00 7:6 l_ocp r/w 10 overcurrent protection timer setting: 00: 4.5 s floating when an overcurrent is detected 01: 27.5 s floating when an overcurrent is detected 10: 10 ms floating when an overcurrent is detected 11: no recovery (stays floating) when an overcurrent is detected 5:4 l_otp r/w 01 overtemperature protection timer setting: 00: 4.5 s floating when an overtemperature is detected 01: 100 ms floating when an overtemperature is detected 10: 1 s floating when an ov ertemperature is detected 11: no recovery (stays floating) when an overtemperature is detected 3 clipctrl r/w 0 clip control bypass setting, see section 9.3 : 0: clip control on (smooth clipping) 1: clip control off (maximum power) 2 hpf_bp r/w 0 high-pass filter bypass setting: 0: high-pass filter active 1: high-pass filter bypassed 1 drc_bp r/w 1 dynamic range compressor bypass setting: 0: dynamic range compression active 1: dynamic range compression bypassed 0 eq_bp r/w 1 equalizer bypass setting: 0: equalizer active 1: equalizer bypassed table 28. drc control register (a ddresses 10h) bit description bit symbol access default description 15:12 at_lvl r/w 1001 dynamic range compressor attack level; see table 11 for the attack level as a function of the value of at_ltv. 11:8 at_rate r/w 0010 dynamic range compressor attack rate; see ta b l e 1 2 for the attack rate as a function of the value of at_rate 37:4 rl_lvl r/w 1011 dynamic range compressor release level; see ta b l e 11 for the release level as a function of the value of rl_ltv. 3:0 rl_rate r/w 1010 dynamic range compressor release rate; see table 12 for the release rate as a function of the value of rl_rate
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 32 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 10.4.6 bass and treble control 10.4.7 high-pass filter [1] default value is 04h. from equation 1 , this gives a high-pass cut-of f frequency of approximately 1.6 f s . table 29. bass and treble control register (addresses 11h) bit description bit symbol access default description 15:14 reserved 13:9 g_trble r/w 01001 treble gain (2 db steps): 00000: ? 18 db 00001: ? 16 db .. .. 01001: 0 db .. .. 10001: +16 db 10010: +18 d8 10011 to 11111: reserved 8:7 f_trble r/w 01 treble control corner frequency, see ta b l e 9 for the corner frequency as a function of the value of f_treble 6:2 g_bass r/w 01001 bass gain (2 db steps): ? 18 db ? 16 db .. .. 01001: 0 db .. .. +16 db +16 d8 reserved 1:0 f_bass r/w 01 bass control corner frequency, see ta b l e 9 for the corner frequency as a function of the value of f_bass table 30. high-pass filter control re gister (addresses 12h) bit description bit symbol access default description 15:9 reserved 8:0 hp_ctrl r/w 0x04 [1] high-pass filter control, see section 9.2.3 for a discussion of the high pass corner frequency as a function of the value of hp_ctrl
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 33 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 10.4.8 volume control 10.4.9 de-emphasis, soft/hard mute and power limiter table 31. volume control register (address 13h) bit description bit symbol access default description 15:13 reserved 000 12 zr_crss r/w 1 volume update at zero crossing audio stream: 0: zero-crossing volume control disabled 1: zero-crossing volume control enabled; default value 11:8 reserved r/w 0000 7:0 vol r/w 0xbd volume control; see table 10 for the amplification and suppression factors as a function of the value of bits vol table 32. de-emphasis, soft/hard mute and power limiter control register (address 14h) bit description bit symbol access default description 15:12 reserved 0000 11:10 de_phas r/w 00 de-em phasis settings, see ta b l e 6 for the de-emphasis configuration for four sample rates as a function of the value of de_phase 9 h_mute r/w 0 hard mute: 0: no hard mute; default value 1: hard mute enabled; implemented by pwm signal with 50% duty-cycle 8 s_mute r/w 0 soft mute; default value: 0: soft mute disabled using raised cosine 1: soft mute enabled using raised cosine 7:0 p_lim r/w 0xbd power limit er control settings; see table 13 for suppressions factors as a func tion of the value of p_lim
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 34 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 10.4.10 miscellaneous status table 33. miscellaneous status regist er (address 15h) bit description bit symbol access description 15 reserved 14 ps r power stage status: 0: class-d audio amplifier power stage floating 1: class-d audio amplifier power stage switching; pwm signals on pins outa and outb 13 pora r analog 1v8 regulator status: 0: 1v8 analog regulator is off or output voltage level is too low 1: 1v8 analog regulator output is available and correct 12:11 reserved 10:9 amp r amplifier mode status: 00: amplifier is off 01: startup 10: startup 11: amplifier is functional 8 ibp(2) r invalid bit clock protection on serial interface input 2: 0: the ratio in frequency between the signal on pin sck2 and the signal on pin lrck2 is valid for the selected interface format 1: the ratio in frequency between the signal on pin sck2 and the signal on pin lrck2 is invalid for the selected interface format 7 ofp(2) r overfrequency protection on serial interface input 2: 0: the frequency of the signal on pin lrck2 is in line with (or lower than) the sele cted interface format 1: the frequency of the signal on pin lrck2 is higher than the selected interface format 6 ufp(2) r underfrequency protection on serial interface input 2: 0: the frequency of the signal on pin lrck2 is in line with (or higher than) the selected interface format 1: the frequency of the signal on pin lrck2 is lower than the selected interface format 5 ibp(1) r invalid bit clock protection on serial interface input 1: 0: the ratio in frequency between the signal on pin sck1 and the signal on pin lrck1 is valid for the selected interface format 1: the ratio in frequency between the signal on pin sck1 and the signal on pin lrck1 is invalid for the selected interface format 4 ofp(1) r overfrequency protection on serial interface input 1: 0: the frequency of the signal on pin lrck1 is in line with (or lower than) the sele cted interface format 1: the frequency of the signal on pin lrck1 is higher than the selected interface format
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 35 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 3 ufp(1) r underfrequency protection on serial interface input 1: 0: the frequency of the signal on pin lrck1 is in line with (or higher than) the selected interface format 1: the frequency of the signal on pin lrck1 is lower than the selected interface format 2 ocpoka r overcurrent protection on pin outa: 0: overcurrent protecti on on pin outa active 1: overcurrent protection on pin outa inactive 1 ocpokb r overcurrent protection on pin outb: 0: overcurrent protection on pin outb active 1: overcurrent protection on pin outb inactive 1 otpok r overtemperature protection: 0: overtemperature protection active 1: overtemperature protection inactive table 33. miscellaneous status regist er (address 15h) bit description ?continued bit symbol access description
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 36 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 11. internal circuitry table 34. internal circuitry pin symbol equivalent circuit 1sda 2scl 3 test1 4 adsel2 5 test3 16 adsel1 17 sdi2 18 sck2 19 lrck2 20 sdi1 21 sck1 22 lrck2 7,8 v ddp 010aaa63 2 1 esd 11, 12, 24 010aaa63 3 esd 11, 12, 24 2 to 5 16 to 22 010aaa63 4 11, 12, 24 7, 8 esd
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 37 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 12. limiting values 9outb 10 outa 13 staba 15 test2 table 34. internal circuitry pin symbol equivalent circuit 010aaa6 35 11, 12, 24 7, 8 9, 10 010aaa63 6 13 esd 11, 12, 24 7,8 010aaa63 7 11, 12, 24 7, 8 15 esd table 35. limiting values in accordance with the absolute ma ximum rating system (iec 60134). symbol parameter conditions min max unit v dda analog supply voltage on pin v ddp ? 0.3 +5.5 v v ddd digital supply voltage on pin v ddd ? 0.3 +1.95 v t j junction temperature - +150 c t stg storage temperature ? 55 +150 c t amb ambient temperature ? 20 +85 c v x voltage on pin x pins lrckx, sckx, sdix, sda, scl, adsel1, adsel2, test1 and test3 ? 0.3 +3.6 v pin test2 ? 0.3 v ddp +0.3 v pins outa and outb ? 0.6 v ddp +0.6 v pin staba ? 0.3 +1.95 v esd electrostatic discharge voltage according to human body model (hbm) ? 2+2 kv according to charge device model (cdm) ? 500 +500 v
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 38 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 13. thermal characteristics [1] measured on a jedec high k-factor test board (standard eia/jesd 51-7). [2] value depends on where measurement is taken on package. table 36. thermal characteristics symbol parameter conditions typ unit r th(j-a) thermal resistance from junction to am bient in free air with natural convection jedec test board [1] 49 k/w 2-layer application board 67 k/w j-lead thermal characterization parameter from junction to lead 23 k/w j-top thermal characterization parameter from junction to top of package [2] 6k/w r th(j-c) thermal resistance from junction to case in free air with natural convection 5 k/w
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 39 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 14. characteristics 14.1 dc characteristics [1] after switching from off/amplifier mode to power-down mode. table 37. dc characteristics all parameters are guaranteed for v ddd = 1.8 v; v ddp = 3.7 v; r l = 8 ; l l = 44 h; f i = 1 khz; f s = 48 khz; clip control off; t amb = 25 c unless otherwise specified. symbol parameter conditions min typ max unit v ddp power supply voltage on pin v ddp 2.5 - 5.5 v v ddd digital supply voltage on pin v ddd 1.65 1.8 1.95 v i p supply current on pin v ddp ; amplifier mode with load; soft mute on -5.7-ma on pin v ddp ; power-down mode - - 20 a i ddd digital supply current on pin v ddd ; amplifier mode - 1.2 - ma on pin v ddd ; power-down mode [1] -515 a series resistance output power switches r dson drain-source on-state resistance lower switch (nmos) - 190 - m upper switch (pmos) - 260 - m amplifier output pins; outa and outb v o(offset) output offset voltage ? 15 0 +15 mv regulator, pin staba v o(reg) regulator output voltage staba to gndp 1.65 - 1.95 v lrck1, sck1, sdi1, lrck2, sck2, sd i2, sda, scl, adsel1 and adsel2 v ih high-level input voltage 0.7v ddd -- v v il low-level input voltage - - 0.3v ddd v c i input capacitance - - 3 pf v ol low-level output voltage at i ol = 2.6 ma - - 400 mv protection t act(th_prot) thermal protection activation temperature 130 - - c i o(ocp) overcurrent protection output current 1.3 - 2.3 a f ofp overfrequency protection frequency a t pwm output frequency - 710 1031 khz f ufp underfrequency protection frequency at pwm output frequency 96 175 - khz
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 40 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 14.2 ac characteristics table 38. ac characteristics all parameters are guaranteed for v ddd = 1.8 v; v ddp = 3.7 v; r l = 8 ; l l = 44 h; f i = 1 khz; f s = 48 khz; clip control off; t amb = 25 c unless otherwise specified. symbol parameter conditions min typ max unit class d amplifier p o(rms) rms output power r l =8 thd+n = 1 % 0.65 0.7 - w thd+n = 10 % - 0.85 - w r l =4 thd+n = 1 % - 1.2 - w thd+n = 10 % - 1.5 - w r l =8 ; v ddp = 4.2 v thd+n = 1 % - 0.9 - w thd+n = 10 % - 1.1 - w r l =4 ; v ddp = 4.2 v thd+n = 1 % - 1.6 - w thd+n = 10 % - 1.95 - w r l =8 ; v ddp = 5.0 v thd+n = 1 % - 1.35 - w thd+n = 10 % - 1.6 - w r l =4 ; v ddp = 5.0 v thd+n = 1 % - 2.35 - w thd+n = 10 % - 2.75 - w po output power efficiency p o(rms) = 850 mw - 92 - % thd+n total harmonic distortion-plus-noise p o(rms) = 100 mw - 0.02 0.1 % v n(o) output noise voltage soft mute; a-weighted - 60 - v s/n signal-to-noise ratio v pvdd = 5 v; p o(rms) = 1.3 w; a-weighted - 94 - db psrr power supply rejection ratio v ripple =200 mv; f ripple = 217 hz 65 80 - db v o(rms) rms output voltage at ? 9 dbfs (rms) digital input volume control = 0 db bass and treble control = 0 db equalizer bypassed and drc bypassed 1.9 2.1 2.3 v power-up, power-down and propagation times t d(on) turn-on delay time off mode to operating mode, soft de-mute excluded -- 5.6ms t d(mute_off) mute off delay time - - 2.67 ms t d(soft_mute) soft mute delay time - - 2.67 ms t pd propagation delay bass and treble control = 0 db, equalizer bypassed and drc bypassed. -600- s
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 41 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 14.3 i 2 c timing characteristics [1] c b is the total capacitance of one bus line in pf. t he maximum capacitive load for each bus line is 400 pf. [2] after this period, the first clock pulse is generated. table 39. i 2 c-bus interface characteristics; see figure 14 all parameters are guaranteed for v ddp = 3.7 v, r l = 8 , l l = 44 h; f i = 1 khz; f s = 48 khz; clip control off; t amb = 25 c unless otherwise specified. symbol parameter conditions min typ max unit f scl scl clock frequency - - 400 khz t low low period of the scl clock 1.3 - - s t high high period of the scl clock 0.6 - - s t r rise time sda and scl signals [1] 20 + 0.1 c b -- ns t f fall time sda and scl signals [1] 20 + 0.1 c b -- ns t hd;sta hold time (repeated) start condition [2] 0.6 - - s t su;sta set-up time for a repeated start condition 0.6 - - s t su;sto set-up time for stop condition 0.6 - - s t buf bus free time between a stop and start condition 1.3 - - s t su;dat data set-up time 100 - - ns t hd;dat data hold time 0 - - s t sp pulse width of spikes that must be suppressed by the input filter 0 - 50 ns c b capacitive load for each bus line - - 400 pf fig 14. i 2 c timing t buf t low t r t f t hd;sta t su;sta t hd;dat t high t su;dat t hd;sta t su;sto t sp p s sr p sda scl 010aaa22 5
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 42 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 14.4 i 2 s timing characteristics [1] r l = load resistance; l l = load inductance. table 40. i 2 s bus interface characteristics; see figure 15 all parameters are guaranteed for v ddd = 1.8 v; v ddp = 3.7 v, r l = 8 [1] , l l = 44 h [1] ; f i = 1 khz; clip control off; t amb =25 c unless otherwise specified. symbol parameter conditions min typ max unit f s sampling frequency on lrck1 or lrck2 pins 8 - 96 khz f clk clock frequency on sck1 or sck2 pins 32f s -64f s hz t su set-up time lrck edge to sck high 10 - - ns sdi edge to sck high 10 - - ns t h hold time sck high to lrck edge 10 - - ns sck high to sdi edge 10 - - ns fig 15. i 2 s timing sck lrck sdi t h t su 010aaa62 4
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 43 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 14.5 pcm/iom2 timing characteristics [1] r l = load resistance; l l = load inductance. table 41. pcm/iom2 characteristics; see figure 16 all parameters are guaranteed for v ddd = 1.8 v; v ddp = 3.7 v, r l = 8 [1] , l l = 44 h [1] ; f i = 1 khz; clip control off; t amb =25 c unless otherwise specified. symbol parameter conditions min typ max unit f p pulse frequency on lrck1 or lrck2 pins - - 8 khz f clk clock frequency on sck1 or sck2 pin 16f p - 192f p hz t su set-up time sck high to lrck edge 10 - - ns sck high to sdi edge 10 - - ns t h hold time lrck edge to sck high 10 - - ns sdi edge to sck high 10 - - ns t p pulse duration pulse on lrck1 pin or lrck2 pin 1/f clk -- s fig 16. pcm/iom2 timing sck lrck, fsc (long) t h t su lrck, fsc (short) sdi t p 010aaa62 5
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 44 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 15. application information the TFA9879 is a filter-free btl class-d amplifier that uses a fixed frequency pwm modulation scheme (see the simplified application schematic in figure 18 ). when the TFA9879 is idle (no audio input signal), the voltage across the speaker is 0 v, generating no additional current. even when the pwm outp ut is modulated by the audio input signal, the out-of-band ac ripple current in the voice coil is very small compared to the audio current. this is due to the inductive behav ior of the voice coil at the pwm switching frequency. a typical voice coil inductance is in the range 30 h to 80 h. 15.1 power capability 15.1.1 estimating the rms output power (p o(rms) ) the rms output power, p o(rms) , at thd + n = 1 % just befor e clipping can be estimated using equation 11 , with clip-control off, or using equation 12 , with clip-control on. clip control off: (11) clip control on: (12) where: r l = load resistance ( ) r s = total series resistance of application r dson = on-resistance of power switch (typically 230 m ) v ddp = power supply voltage (v) m max = maximum modulation depth (clip control on); typically 0.9 example (clip control off): with v ddp =5v, r dson =0.23 (at t j =25 c), r s =0.14 : p o(rms)1% = 1.35 w in an 8 load or p o(rms)1% = 2.35 w in a 4 load the rms output power at thd + n = 10 % can be estimated using equation 13 : (13) p orms () 1 % r l r l r s 2r dson () ++ ----------------------------------------------------- - ?? ?? v ddp ?? ?? 2 2r l --------------------------------------------------------------------------------------- - = p orms () 1 % r l r l r s 2r dson () ++ ----------------------------------------------------- - ?? ?? m max v ddp ?? ?? 2 2r l ----------------------------------------------------------------------------------------------------------- = p 0rms () 10 % 1.25 p 0rms () 1 % =
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 45 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 15.1.2 output current limiting the peak output current i o(max) is limited internally by ocp. the minimum ocp trigger level is 1.3 a. during normal operation, the output current should not exceed this threshold level, otherwise the audio signal will be distorted. the pea k output current in btl configuration can be calculated using equation 14 : (14) where: v ddp = power supply voltage (v) r l = load resistance ( ) r dson = drain-source on-state resistance ( ) example: a 4 speaker can be used with a 5 v supply without triggering ocp. 15.2 pwm output filtering the TFA9879 pwm power stage is optimized to meet the legal limits (fcc) for radiated emissions without requiring an external filter (speaker cable < 5 cm). but a low-pass lc filter is recommended if a long speaker cable can?t be avoided or other components in the application are sensitive to frequencies in the 10 mhz to 150 mhz range (e.g. an fm tuner). the suggested differential low-pass filter consists of a ferrite bead inductor (z > 80 at 100 mhz) and a small ceramic capacitor of about 1 nf (see figure 17 ). 15.3 supply decoupling and filtering a ceramic decoupling capacitor of between 1 f and 10 f should be placed close to the TFA9879 to minimize the size of the high-frequency current loop, thereby optimizing emc performance. optionally, a small 1 nf ceramic capacitor can be connected in parallel to further reduce the impedance. i omax () i oocp () v ddp 2r dson r l + ------------------------------------ - 1.3a ? fig 17. optional low-pass lc filter 1 nf 1 nf speaker cables > 5 cm outa outb TFA9879 class-d amplifier ferrite bead 010aaa62 6
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 46 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 15.4 pcb layout considerations great care should be taken when designing the pcb layout for a class-d amplifier circuit as the layout can affect the audio performa nce, the emc performance and/or the thermal performance, and can even affect the functionality of the TFA9879. 15.4.1 emc considerations the decoupling capacitors on pins v ddd , v ddp and staba should be placed close to the TFA9879, referenced to a solid ground plane. the exposed dap should also be connected to this ground plane. 15.4.2 thermal considerations the TFA9879 is available in a thermally enhanced hvqfn24 (sot616-3) package for reflow soldering. the hvqfn24 has an ex posed dap that signifi cantly reduces the thermal resistance, r th(j-a) . to achieve a lower overall thermal resistance, the exposed dap should be soldered to a thermal copper plane. increasing the area of the thermal plane, the number of planes or the copper thickness can further reduce the thermal resistance. the typical thermal resistance (fre e air and natural convection) of a practical pcb implementation is: r th(j-a) = 67 k/w for a two-layer application board (18 mm 22 mm, 35 m copper, fr4 base material). equation 15 describes the relationship between t he maximum allowable power dissipation (p) and the thermal resistance from junction to ambient. (15) where: r th(j-a) = thermal resistance from junction to ambient t j(max) = maximum junction temperature (125 c) t amb = ambient temperature p = power dissipated in the TFA9879 otp will limit the maximum j unction temperat ure to 130 c to avoid thermal damage. r th j - a () t jmax () t amb ? p ---------------------------------- - =
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 47 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 15.5 typical application diagram (simplified) fig 18. typical application (simplified) tfa8979hn cstaba 100 nf v ddp lrck1 v ddp sck1 sdi1 outa lrck2 sck2 outb sdi2 adsel1 scl sda staba 010aaa545 22 21 20 19 18 17 16 2 1 v ddd 23 13 9 10 7 8 gndp gndp 12 11 gndd 24 baseband processor i 2 s output multimedia processor i 2 s output address select 1 scl sda 1.8 v cvddd 100 nf test2 15 dap battery cvddp 10 f speaker 4 or 8 test1 3 test3 5 n.c. 6, 14 adsel2 4 address select 2
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 48 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 15.6 curves measured in referen ce design (demonstration board) all measurements were taken with v ddd =1.8v, f s = 48 khz, clip control on and the high-pass filter off, unless otherwise specified. (1) f i = 6 khz. (2) f i = 1 khz. (3) f i = 100 hz. (1) f i = 6 khz. (2) f i = 1 khz. (3) f i = 100 hz. a. v ddp =3.7v,r l =8 b. v ddp =5v,r l =8 (1) f i = 6 khz. (2) f i = 1 khz. (3) f i = 100 hz. (1) f i = 6 khz. (2) f i = 1 khz. (3) f i = 100 hz. c. v ddp =3.7v,r l =4 d. v ddp =5v,r l =4 fig 19. total harmonic distortion-plus-noise as a function of output power (2) (1) (3) 010aaa675 p o (w) 10 ? 2 10 1 10 ? 1 10 ? 1 10 ? 2 10 1 10 2 thd+n (%) 10 ? 3 (2) 010aaa676 p o (w) 10 ? 2 10 1 10 ? 1 10 ? 1 10 ? 2 10 1 10 2 thd+n (%) 10 ? 3 (3) (1) 010aaa677 p o (w) 10 ? 2 10 1 10 ? 1 10 ? 1 10 ? 2 10 1 10 2 thd+n (%) 10 ? 3 (1) (3) (2) (1) (3) 010aaa678 p o (w) 10 ? 2 10 1 10 ? 1 10 ? 1 10 ? 2 10 1 10 2 thd+n (%) 10 ? 3 (2)
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 49 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input (1) p o = 100 mw (2) p o = 500 mw (1) p o = 100 mw (2) p o = 500 mw a. v ddp =3.7v,r l =8 b. v ddp =5v,r l =8 (1) p o = 100 mw (2) p o = 500 mw (1) p o = 100 mw (2) p o = 1 w c. v ddp =3.7v,r l =4 d. v ddp =5v,r l =4 fig 20. total harmonic distortion-plus-noise as a function of frequency 010aaa679 10 ? 1 10 ? 2 10 1 10 2 thd+n (%) 10 ? 3 f (hz) 10 10 5 10 4 10 2 10 3 (1) (2) 010aaa680 10 ? 1 10 ? 2 10 1 10 2 thd+n (%) 10 ? 3 f (hz) 10 10 5 10 4 10 2 10 3 (1) (2) 010aaa681 10 ? 1 10 ? 2 10 1 10 2 thd+n (%) 10 ? 3 f (hz) 10 10 5 10 4 10 2 10 3 (1) (2) 010aaa682 10 ? 1 10 ? 2 10 1 10 2 thd+n (%) 10 ? 3 f (hz) 10 10 5 10 4 10 2 10 3 (1) (2)
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 50 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input (1) v ripple = 0 v (f ripple = 0 hz) (2) f ripple = 217 hz (3) f ripple = 1 khz (4) f ripple = 6 khz (1) v ripple = 0 v (f ripple = 0 hz) (2) f ripple = 217 hz (3) f ripple = 1 khz (4) f ripple = 6 khz a. v ddp =3.7v,r l =8 , p o = 100 mw, v ripple = 200 mv (rms) b. v ddp =5v,r l =8 , p o = 100 mw, v ripple = 200 mv (rms) fig 21. total harmonic distortion-plus-noise and power supply intermodulation distortion as a function of frequency (1) (3) (4) (2) 010aaa683 10 ? 1 10 ? 2 10 1 10 2 thd+n (%) 10 ? 3 f (hz) 10 10 5 10 4 10 2 10 3 (2) (1) (3) (4) 010aaa684 10 ? 1 10 ? 2 10 1 10 2 thd+n (%) 10 ? 3 f (hz) 10 10 5 10 4 10 2 10 3 v ddp = 3.7 v, r l =8 , p o = 500 mw (1) high-pass filter off (2) high-pass filter cut-off frequency: 100 hz (3) high-pass filter cut-off frequency: 500 hz v ddp =5v, r l =8 , ripple = 200 mv (rms) (1) v ddp = 3.7 v (2) v ddp = 5 v fig 22. normalized gain as a function of frequency fig 23. power supply rejection ration as a function of ripple frequency 010aaa685 ? 20 ? 10 ? 30 0 10 g db ? 40 f (hz) 10 10 5 10 4 10 2 10 3 (1) (2) (3) 010aaa686 ? 60 ? 40 ? 80 ? 20 0 psrr (db) ? 100 f ripple (hz) 10 10 5 10 4 10 2 10 3 (1) (2)
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 51 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input v ddp =5v, r l =8 , reference signal: 3.5 v (rms) (1) a-weighted (2) 20 khz brickwall filter fig 24. signal-to-noise ratio as a function of output power p o (w) 10 ? 2 10 1 10 ? 1 010aaa687 60 80 40 100 120 s/n (db) 20 (1) (2) (1) thd+n = 1 %, r l =8 (2) thd+n = 10 %, r l =8 (3) thd+n = 1 %, r l =4 (4) thd+n = 10 %, r l =4 (1) thd+n = 1 %, r l =8 (2) thd+n = 10 %, r l =8 (3) thd+n = 1 %, r l =4 (4) thd+n = 10 %, r l =4 a. f i = 100 hz, clip control on b. f i = 100 hz, clip control off fig 25. output power as a function of supply voltage v ddp (v) 26 5 34 010aaa688 2 1 3 4 p o (w) 0 (4) (3) (2) (1) v ddp (v) 26 5 34 010aaa689 2 1 3 4 p o (w) 0 (4) (3) (2) (1)
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 52 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input (1) v ddp =3.7v (2) v ddp =5v (1) v ddp =3.7v (2) v ddp =5v a. r l =8 , f i = 1 khz, clip control off b. r l =4 , f i = 1 khz, clip control off fig 26. power dissipation as a function of output power 010aaa694 0.10 0.05 0.15 0.20 p (w) 0.00 p o (w) 10 ? 3 10 1 10 ? 2 10 ? 1 (2) (1) (2) (1) 010aaa696 0.2 0.3 0.1 0.4 0.5 p (w) 0.0 p o (w) 10 ? 3 10 1 10 ? 2 10 ? 1 (1) v ddp =3.7v (2) v ddp =5v (1) v ddp =3.7v (2) v ddp =5v a. r l =8 , f i = 1 khz, clip control off b. r l =4 , f i = 1 khz, clip control off fig 27. efficiency as a function of output power (1) (2) p o (w) 02 1.5 0.5 1 010aaa695 40 60 20 80 100 (%) 0 010aaa697 p o (w) 03 2 1 40 60 20 80 100 (%) 0 (1) (2)
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 53 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 16. package outline fig 28. package outline TFA9879 (hvqfn24) 0.5 1 0.2 a 1 e h b unit y e references outline version european projection issue date iec jedec jeita mm 4.1 3.9 d h 2.75 2.45 y 1 4.1 3.9 2.75 2.45 e 1 2.5 e 2 2.5 0.30 0.18 c 0.05 0.00 0.05 0.1 dimensions (mm are the original dimensions) sot616-3 mo-220 04-11-19 05-03-10 - - - - - - 0.5 0.3 l 0.1 v 0.05 w 0 2.5 5 mm scale sot616 -3 h vqfn24: plastic thermal enhanced very thin quad flat package; no leads; 2 4 terminals; body 4 x 4 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 712 24 19 18 13 6 1 x d e c b a e 2 terminal 1 index area terminal 1 index area a c c b v m w m 1/2 e 1/2 e e (1) note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1)
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 54 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 17. soldering of smd packages this text provides a very brief insight into a complex technology. a more in-depth account of soldering ics can be found in application note an10365 ?surface mount reflow soldering description? . 17.1 introduction to soldering soldering is one of the most common methods through which packages are attached to printed circuit boards (pcbs), to form electr ical circuits. the soldered joint provides both the mechanical and the electrical connection. th ere is no single sold ering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mount devices (smds) are mixed on one printed wiring board; however, it is not suitable for fine pitch smds. reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 17.2 wave and reflow soldering wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. the wave soldering process is suitable for the following: ? through-hole components ? leaded or leadless smds, which are glued to the surface of the printed circuit board not all smds can be wave soldered. packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. also, leaded smds with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased pr obability of bridging. the reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. leaded packages, packages with solder balls, and leadless packages are all reflow solderable. key characteristics in both wave and reflow soldering are: ? board specifications, in cluding the board finish , solder masks and vias ? package footprints, including solder thieves and orientation ? the moisture sensitivit y level of the packages ? package placement ? inspection and repair ? lead-free soldering versus snpb soldering 17.3 wave soldering key characteristics in wave soldering are: ? process issues, such as application of adhe sive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave ? solder bath specifications, including temperature and impurities
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 55 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 17.4 reflow soldering key characteristics in reflow soldering are: ? lead-free versus snpb solderi ng; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see figure 29 ) than a snpb process, thus reducing the process window ? solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board ? reflow temperature profile; this profile includ es preheat, reflow (in which the board is heated to the peak temperature) and coolin g down. it is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). in addition, the peak temperature must be low enough that the packages and/or boards are not damaged. the peak temperature of the package depends on package thickness and volume and is classified in accordance with ta b l e 4 2 and 43 moisture sensitivity precautions, as indicat ed on the packing, must be respected at all times. studies have shown that small packages reach higher temperatures during reflow soldering, see figure 29 . table 42. snpb eutectic process (from j-std-020c) package thickness (mm) package reflow temperature ( c) volume (mm 3 ) < 350 350 < 2.5 235 220 2.5 220 220 table 43. lead-free process (from j-std-020c) package thickness (mm) package reflow temperature ( c) volume (mm 3 ) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 56 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input for further information on temperature profiles, refer to application note an10365 ?surface mount reflow soldering description? . msl: moisture sensitivity level fig 29. temperature profiles for large and small components 001aac84 4 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = msl limit, damage level peak temperature
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 57 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 18. revision history table 44. revision history document id release date data sheet status change notice supersedes TFA9879 v.2 20101015 product data sheet - TFA9879 v.1 modifications: ? specification status chang ed to product data sheet TFA9879 v.1 20100408 preliminary data sheet - -
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 58 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input 19. legal information 19.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 19.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 19.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interrupt ion, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use ? nxp semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from national authorities. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this docu ment contains the product specification.
TFA9879 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 02 ? 15 october 2010 59 of 60 nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input quick reference data ? the quick reference data is an extract of the product data given in the limiting values and characteristics sections of this document, and as such is not comple te, exhaustive or legally binding. non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semicon ductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liabili ty for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses t he product for design-in and use in automotive applications to automotive s pecifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully indemnifies nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive app lications beyond nxp semiconductors? standard warranty and nxp semiconduct ors? product specifications. 19.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. i 2 c-bus ? logo is a trademark of nxp b.v. 20. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors TFA9879 mono btl class-d audio amplifier with digital input ? nxp b.v. 2010. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 15 october 2010 document identifier: TFA9879 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 21. contents 1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 general description . . . . . . . . . . . . . . . . . . . . . . 1 3 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3.1 general features . . . . . . . . . . . . . . . . . . . . . . . . 1 3.2 programmable digital sound processor (dsp) 2 3.3 interface format support for digital audio inputs 2 4 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 quick reference data . . . . . . . . . . . . . . . . . . . . . 3 6 ordering information . . . . . . . . . . . . . . . . . . . . . 3 7 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 pinning information . . . . . . . . . . . . . . . . . . . . . . 5 8.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 9 functional description . . . . . . . . . . . . . . . . . . . 6 9.1 operating modes . . . . . . . . . . . . . . . . . . . . . . . 7 9.1.1 power-up/power-down . . . . . . . . . . . . . . . . . . . 7 9.1.2 supported digital audio data formats . . . . . . . . 8 9.2 digital signal processor (dsp) features. . . . . 11 9.2.1 serial interface selection . . . . . . . . . . . . . . . . 11 9.2.2 mono selection . . . . . . . . . . . . . . . . . . . . . . . . 11 9.2.3 programmable high-pass filter . . . . . . . . . . . . 11 9.2.4 de-emphasis . . . . . . . . . . . . . . . . . . . . . . . . . 11 9.2.5 equalizer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 9.2.5.1 equalizer band function . . . . . . . . . . . . . . . . . 12 9.2.5.2 equalizer band control . . . . . . . . . . . . . . . . . . 14 9.2.6 bass and treble control . . . . . . . . . . . . . . . . . . 16 9.2.7 muting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 9.2.8 digital volume control . . . . . . . . . . . . . . . . . . . 18 9.2.9 zero-crossing volume contro l . . . . . . . . . . . . . 18 9.2.10 dynamic range compressor (drc) . . . . . . . 18 9.2.10.1 functional description. . . . . . . . . . . . . . . . . . . 19 9.2.10.2 drc control . . . . . . . . . . . . . . . . . . . . . . . . . . 19 9.2.11 power limiter . . . . . . . . . . . . . . . . . . . . . . . . . . 21 9.3 class-d amplification and clip control. . . . . . . 22 9.4 protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 9.4.1 overtemperature protecti on (otp) . . . . . . . . 23 9.4.2 overcurrent protection (ocp) . . . . . . . . . . . . 23 9.4.3 underfrequency protection (ufp) . . . . . . . . . 23 9.4.4 overfrequency protection (ofp) . . . . . . . . . . 24 9.4.5 invalid bit-clock protection (ibp) . . . . . . . . . . 24 9.4.6 overview of protection circuits . . . . . . . . . . . . 24 10 i 2 c-bus interface and register settings . . . . . 24 10.1 i 2 c-bus interface. . . . . . . . . . . . . . . . . . . . . . . 24 10.2 i 2 c-bus write cycle . . . . . . . . . . . . . . . . . . . . . 25 10.3 i 2 c-bus read cycle . . . . . . . . . . . . . . . . . . . . . 26 10.4 top-level register map . . . . . . . . . . . . . . . . . . 26 10.4.1 device control . . . . . . . . . . . . . . . . . . . . . . . . 27 10.4.2 serial interface control . . . . . . . . . . . . . . . . . . 28 10.4.3 equalizer configuration . . . . . . . . . . . . . . . . . 30 10.4.4 bypass control . . . . . . . . . . . . . . . . . . . . . . . . 31 10.4.5 dynamic range compressor . . . . . . . . . . . . . . 31 10.4.6 bass and treble control . . . . . . . . . . . . . . . . . 32 10.4.7 high-pass filter . . . . . . . . . . . . . . . . . . . . . . . . 32 10.4.8 volume control . . . . . . . . . . . . . . . . . . . . . . . . 33 10.4.9 de-emphasis, so ft/hard mute and power limiter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 10.4.10 miscellaneous status . . . . . . . . . . . . . . . . . . . 34 11 internal circuitry . . . . . . . . . . . . . . . . . . . . . . . 36 12 limiting values . . . . . . . . . . . . . . . . . . . . . . . . 37 13 thermal characteristics . . . . . . . . . . . . . . . . . 38 14 characteristics . . . . . . . . . . . . . . . . . . . . . . . . 39 14.1 dc characteristics . . . . . . . . . . . . . . . . . . . . . 39 14.2 ac characteristics . . . . . . . . . . . . . . . . . . . . . 40 14.3 i 2 c timing characteristics . . . . . . . . . . . . . . . . 41 14.4 i 2 s timing characteristics . . . . . . . . . . . . . . . . 42 14.5 pcm/iom2 timing characteristics. . . . . . . . . . 43 15 application information . . . . . . . . . . . . . . . . . 44 15.1 power capability. . . . . . . . . . . . . . . . . . . . . . . 44 15.1.1 estimating the rms output power (p o(rms) ) . 44 15.1.2 output current limiting . . . . . . . . . . . . . . . . . . 45 15.2 pwm output filtering. . . . . . . . . . . . . . . . . . . . 45 15.3 supply decoupling and filtering . . . . . . . . . . . 45 15.4 pcb layout considerations. . . . . . . . . . . . . . . 46 15.4.1 emc considerations. . . . . . . . . . . . . . . . . . . . 46 15.4.2 thermal considerations . . . . . . . . . . . . . . . . . 46 15.5 typical application diagram (simplified) . . . . . 47 15.6 curves measured in reference design (demonstration board) . . . . . . . . . . . . . . . . . . 48 16 package outline. . . . . . . . . . . . . . . . . . . . . . . . 53 17 soldering of smd packages . . . . . . . . . . . . . . 54 17.1 introduction to soldering. . . . . . . . . . . . . . . . . 54 17.2 wave and reflow soldering. . . . . . . . . . . . . . . 54 17.3 wave soldering . . . . . . . . . . . . . . . . . . . . . . . 54 17.4 reflow soldering . . . . . . . . . . . . . . . . . . . . . . 55 18 revision history . . . . . . . . . . . . . . . . . . . . . . . 57 19 legal information . . . . . . . . . . . . . . . . . . . . . . 58 19.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 58 19.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 19.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 58 19.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 59 20 contact information . . . . . . . . . . . . . . . . . . . . 59 21 contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

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